For the complete documentation index, see llms.txt. Markdown versions of all pages are available by appending .md to any URL (e.g. /get-started.md).
Mojo module
intrinsics
Provides low-level GPU intrinsic operations and memory access primitives.
Implements hardware-specific intrinsics that map directly to GPU assembly instructions, focusing on NVIDIA GPU architectures. Includes:
- Global memory load/store operations with cache control
- Warp-level primitives and synchronization
- Memory fence and barrier operations
- Atomic operations and memory ordering primitives
These low-level primitives should be used carefully as they correspond directly to hardware instructions and require understanding of the underlying GPU architecture.
Structs
-
AMDBufferResource: 128-bit descriptor for a buffer resource on AMD GPUs. -
CacheOperation: Represents different GPU cache operation policies. -
Scope: Represents memory synchronization scope levels for GPU memory operations.
Functions
-
byte_permute: Permutes bytes from two 32-bit integers based on a control mask. -
cvt_pk_fp8_f32_raw: Packs 4 f32 into 4 fp8 via 2 chainedv_cvt_pk_fp8_f32ops. -
ds_read_tr16_b64: Reads a 64-bit LDS transpose block using TR16 layout and returns SIMD[dtype, 4] of 16-bit types. -
ds_read_tr8_b64: Reads a 64-bit LDS transpose block using TR8 layout and returns SIMD[dtype, 8] of 8-bit types. -
get_ib_sts: Returns the IB status of the current thread. -
inlined_assembly: Generates inline assembly code with the given constraints and arguments. -
ldg: Load data from global memory through the non-coherent cache. -
lop: Performs an arbitrary logical operation on 3 inputs using a lookup table. -
mulhi: Calculates the most significant 32 bits of the product of two 16-bit unsigned integers. -
mulwide: Performs a wide multiplication of two 32-bit unsigned integers. -
permlane_shuffle: Shuffles SIMD values across lanes using AMD permlane operations. -
permlane_swap: Swaps values between lanes using AMD permlane swap instruction. -
threadfence: Enforces ordering of memory operations across threads. -
warpgroup_reg_alloc: Allocates additional registers for the executing warp group. -
warpgroup_reg_dealloc: Deallocates additional registers for the executing warp group.