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Mojo struct
SmemBarriers
struct SmemBarriers[num_group_pipeline_stages: Int, num_accum_pipeline_stages: Int, num_clc_pipeline_stages: Int]
Composable barrier storage for SM100 matmul SMEM structs.
This struct consolidates all barrier-related storage and accessors, enabling code reuse across MatmulSmem, BlockScaledSmem, and BlockwiseFP8Smem through composition.
Usage: Compose this struct into SMEM structs and delegate accessors:
```
struct MySmem[...]:
var barriers: SmemBarriers[num_group, num_accum, num_clc]
def input_barriers(ref[AddressSpace.SHARED] self):
return self.barriers.input_barriers()
```Parameters
- num_group_pipeline_stages (
Int): Number of K-group pipeline stages. - num_accum_pipeline_stages (
Int): Number of accumulator pipeline stages. - num_clc_pipeline_stages (
Int): Number of CLC pipeline stages.
Fields
- input_barriers_storage (
SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].InputBarriers.Storage): - accum_barriers_storage (
SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].AccumBarriers.Storage): - clc_full_storage (
SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcBarriers.Storage): - clc_empty_storage (
SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcBarriers.Storage): - clc_throttle_storage (
SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcThrottleBarriers.Storage): - clc_response_storage (
SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcResponse.Storage): - tmem_dealloc_storage (
SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].TmemDealloc.Storage): - tmem_addr_storage (
SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].TmemAddr.Storage):
Implemented traits
comptime members
AccumBarriers
comptime AccumBarriers = SMemArray[SharedMemBarrier, (num_accum_pipeline_stages * Int(2))]
ClcBarriers
comptime ClcBarriers = SMemArray[SharedMemBarrier, num_clc_pipeline_stages]
ClcResponse
comptime ClcResponse = SMemArray[UInt128, num_clc_pipeline_stages]
ClcThrottleBarriers
comptime ClcThrottleBarriers = SMemArray[SharedMemBarrier, (num_clc_pipeline_stages * Int(2))]
InputBarriers
comptime InputBarriers = SMemArray[SharedMemBarrier, (num_group_pipeline_stages * Int(2))]
TmemAddr
comptime TmemAddr = SMemArray[UInt32, Int(1)]
TmemDealloc
comptime TmemDealloc = SMemArray[SharedMemBarrier, Int(1)]
Methods
input_barriers
def input_barriers(ref[AddressSpace._value] self) -> Self.InputBarriers
Returns input tile pipeline barriers (2 per group stage).
Returns:
Self.InputBarriers
accum_barriers
def accum_barriers(ref[AddressSpace._value] self) -> Self.AccumBarriers
Returns accumulator pipeline barriers (2 per accum stage).
Returns:
Self.AccumBarriers
clc_full
def clc_full(ref[AddressSpace._value] self) -> Self.ClcBarriers
Returns CLC full barriers (1 per CLC stage).
Returns:
Self.ClcBarriers
clc_empty
def clc_empty(ref[AddressSpace._value] self) -> Self.ClcBarriers
Returns CLC empty barriers (1 per CLC stage).
Returns:
Self.ClcBarriers
clc_throttle
def clc_throttle(ref[AddressSpace._value] self) -> Self.ClcThrottleBarriers
Returns CLC throttle barriers (2 per CLC stage).
Returns:
Self.ClcThrottleBarriers
clc_response
def clc_response(ref[AddressSpace._value] self) -> Self.ClcResponse
Returns CLC response storage (1 UInt128 per CLC stage).
Returns:
Self.ClcResponse
tmem_dealloc
def tmem_dealloc(ref[AddressSpace._value] self) -> Self.TmemDealloc
Returns TMEM deallocation barrier.
Returns:
Self.TmemDealloc
tmem_addr
def tmem_addr(ref[AddressSpace._value] self) -> Self.TmemAddr
Returns TMEM address storage.
Returns:
Self.TmemAddr