For the complete documentation index, see llms.txt. Markdown versions of all pages are available by appending .md to any URL (e.g. /get-started.md).

Mojo struct

ReduceSum

struct ReduceSum[dtype: DType, W: Int = simd_width_of[dtype]()]

Sum reduction monoid: (self, x) -> self + x.

Single-field state: acc: SIMD[dtype, W]. accumulate is one expression — acc += Self.pad[...](val). Per-tile work is one lane-wise SIMD add; the horizontal collapse SIMD[W] -> Scalar happens once at reduce, with the final scalar in acc[0]. Bodies read state.acc[0].

W defaults to simd_width_of[dtype](), target-aware (large on CPU, small on GPU). On the tiled tier the monoid runs with one lane per independent output column; the cross-lane reduce / join_parallel are skipped.

Parameters

• ​dtype (DType): The accumulator dtype.
• ​W (Int): SIMD width of the lane-wise accumulator. Defaults to the target's simd_width_of[dtype].

Fields

• ​acc (SIMD[dtype, W]): Lane-wise SIMD accumulator. Per-tile work is one lane-wise add; reduce reduces to scalar (placed in acc[0]). Bodies read acc[0].

Implemented traits

AnyType, Copyable, Deinitable, ImplicitlyCopyable, Movable, ReduceOp, RegisterPassable, TrivialRegisterPassable

comptime members

Single

comptime Single = ReduceSum[dtype, Int(1)]

width

comptime width = W

Methods

__init__

def __init__() -> Self

Identity: acc = 0_W.

__getitem__

def __getitem__(self, j: Int) -> Self.Single

Returns lane j as a width-1 monoid.

Returns:

Self.Single

__setitem__

def __setitem__(mut self, j: Int, s: ReduceSum[dtype, Int(1)])

Writes width-1 monoid s into lane j.

accumulate

def accumulate[val_dtype: DType, w: Int](mut self, val: SIMD[val_dtype, w], idx: SIMD[DType.int64, w] = 0)

Folds a SIMD tile into acc lane-wise. Single expression; Self.pad lifts partial tiles to width Self.W with 0 tail lanes.

Parameters:

• ​val_dtype (DType): The tile's source dtype.
• ​w (Int): SIMD width of the tile.

Args:

• ​val (SIMD[val_dtype, w]): The SIMD tile to fold.
• ​idx (SIMD[DType.int64, w]): Unused (Sum is index-agnostic).

join

def join(mut self, other: Self)

Sequential combine: lane-wise add.

Args:

• ​other (Self): The state to combine into self.

reduce

def reduce(self) -> Self.Single

Sums the W lane partials via the reduce_add intrinsic.

Overrides the default lane-fold so the vectorized horizontal add is emitted explicitly rather than reconstructed from a scalar chain by the optimizer (a measured CPU win; GPU-neutral).

Returns:

Self.Single: A width-1 ReduceSum holding the total in acc[0].

join_parallel

def join_parallel[R: Reducer](mut self, reducer: R)

Cross-thread combine via reducer.sum, splatting the scalar result across all lanes so bodies read acc.slice[w] uniformly. Runs after reduce, so acc[0] already holds the within-thread sum.

Parameters:

• ​R (Reducer): The parallel scalar reducer.

Args:

• ​reducer (R): The reducer instance.